Recent Work Experience

  • Present 08/2019

    Software Engineer

    Google, Mountain View

  • 09/2018 06/2018

    Research Scientist Intern

    Adobe Research, San Jose

  • 09/2017 06/2017

    Research Data Scientist Intern

    Adobe Research, San Jose

  • 09/2015 06/2015

    Research Scientist Intern

    Adobe Research, San Jose

Education

  • Ph.D. 2019

    Doctor of Philosophy in Computer Science

    University of California, Los Angeles, Department of Computer Science

  • M.S.2018

    Master of Science in Computer Science

    University of California, Los Angeles, Department of Computer Science

  • B.S.2014

    Bachelor of Science in Computer Science

    University of California, Los Angeles

Honors, Awards and Grants

  • 2018
    HOST 2018 Student Travel Grant
  • 2014-2015
    Venky Harinarayan Fellowship
  • 2011-2012
    Dean's Honor List

Research Projects

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    Proof-of-Ownership

    We replace the energy and computation hungry proof-of-work measure with a novel and efficient proof-of-ownership method.

    Proof-of-work is a very important measure in blockchain technology. However, current proof-of-work implementations are very expensive and power hungry, wasting much energy and computational resources in vain. We present a proof-of-ownership method to be used in a private blockchain setup that utilize execution-simulation-gap of some dedicated hardware so that the blockchain is still protected by computation, but in a much more efficient way.

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    Protecting Neural Network Models using Neuron Watermark

    We present a method to watermark a trained neural network model. Our method utilizes ReLu dead neurons to implant a watermakr as a proof of ownership.

    As neural network models are being used in a wide range of applications, model sharing is becoming more needed than ever. However model sharing also put the intellectual property and the training effort in danger. In order to prove that a specific model is trainined by a specific individual using a specific design on a specific training dataset, we propose to use dead Relu neurons as a robust watermark in neural models. Our method is robust against network pruning, model compression, fine-tuning and parameter tuning.

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    Efficient and Secure Group Key Management in IoT using Multistage Interconnected PUF

    We propose a group key management scheme based on a novel PUF design: multistage interconnected physically unclonable function (MIPUF) to secure group communications in an energy-constrained environment.

    Secure group-oriented communication is crucial to a wide range of applications in Internet of Things (IoT). Security problems related to group-oriented communications in IoTbased applications placed in a privacy-sensitive environment have become a major concern along with the development of the technology. Unfortunately, many IoT devices are designed to be portable and light-weight; thus, their functionalities, including security modules, are heavily constrained by the limited energy resources (e.g., battery capacity). To address these problems, we propose a group key management scheme based on a novel PUF design: multistage interconnected physically unclonable function (MIPUF) to secure group communications in an energy-constrained environment. Our design is capable of performing key management tasks such as key distribution, key storage and rekeying securely and efficiently. We show that our design is secure against multiple attack methods and our experimental results show that our design saves 47.33% of global energy comparing to state-of-the-art Elliptic-curve cryptography (ECC)-based key management scheme on average.

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    Securing Interconnected PUF Network with Reconfigurability

    We present a reconfigurable interconnected PUF network (IPN) design that significantly strengthens the security and unclonability of strong PUFs.

    Physical Unclonable Functions (PUFs) are known for their unclonability and light-weight design. Recent advancement in technology has significantly compromised the security of PUFs. Machine learning-based attacks have been proven to be able to construct numerical models that predict various types of PUFs with high accuracy with a small set of challenge-response pairs (CRPs). To address the problem, we present a reconfigurable interconnected PUF network (IPN) design that significantly strengthens the security and unclonability of strong PUFs. While the IPN structure itself provides high resilience against modeling attacks, the reconfiguration mechanism remaps the input-output mapping before an attacker could collect sucient CRPs. Experimental results show that all tested state-of-the-art machine learning attack methods have prediction accuracy of around 50% on a single bit output of a reconfigurable IPN.

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    Unsupervised Video Summarization using Generative Deep Neural Network

    We present a framework ReconstSum that utilizes LSTM-based autoencoder architecture to extract and select a sparse subset of video frames or keyshots that optimally represent the input video in an unsupervised manner.

    Video summaries come in many forms, from traditional single-image thumbnails, animated thumbnails, storyboards, to trailer-like video summaries. Content creators use the summaries to display the most attractive portion of their videos; the users use them to quickly evaluate if a video is worth watching. All forms of summaries are essential to video viewers, content creators, and advertisers. Often video content management systems have to generate multiple versions of summaries that vary in duration and presentational forms. We present a framework ReconstSum that utilizes LSTM-based autoencoder architecture to extract and select a sparse subset of video frames or keyshots that optimally represent the input video in an unsupervised manner. The encoder selects a subset from the input video while the decoder seeks to reconstruct the video from the selection. The goal is to minimize the difference between the original input video and the reconstructed video. Our method is easily extendable to generate a varietyof applications including static video thumbnails, animated thumbnails, storyboards and "trailer-like" highlights. We specifically study and evaluate two most popular use cases: thumbnail generation and storyboard generation. We demonstrate that our methods generate better results than the state-of-the-art techniques in both use cases.

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Efficient and Secure Group Key Management in IoT using Multistage Interconnected PUF

Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2018 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), ACM, 2018.

Abstract

Secure group-oriented communication is crucial to a wide range of applications in Internet of Things (IoT). Security problems related to group-oriented communications in IoT-based applications placed in a privacy-sensitive environment have become a major concern along with the development of the technology. Unfortunately, many IoT devices are designed to be portable and light-weight; thus, their functionalities, including security modules, are heavily constrained by the limited energy resources (e.g., battery capacity). To address these problems, we propose a group key management scheme based on a novel PUF design: multistage interconnected physically unclonable function (MIPUF) to secure group communications in an energy-constrained environment. Our design is capable of performing key management tasks such as key distribution, key storage and rekeying securely and efficiently. We show that our design is secure against multiple attack methods and our experimental results show that our design saves 47.33% of global energy comparing to state-of-the-art Elliptic-curve cryptography (ECC)-based key management scheme on average.

Efficient Image Sensor Subsampling for DNN-Based Image Classification

Jia Guo, Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2018 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), ACM, 2018.

Abstract

Today’s mobile devices are equipped with cameras capable of taking very high-resolution pictures. For computer vision tasks which require relatively low resolution, such as image classification, sub-sampling is desired to reduce the unnecessary power consumption of the image sensor. In this paper, we study the relationship between subsampling and the performance degradation of image classifiers that are based on deep neural networks (DNNs). We empirically show that subsampling with the same step size leads to very similar accuracy changes for different classifiers. In particular, we could achieve over 15× energy savings just by subsampling while suffering almost no accuracy lost. For even better energy accuracy trade-offs, we propose AdaSkip, where the row sampling resolution is adaptively changed based on the image gradient. We implement AdaSkip on an FPGA and report its energy consumption.

From Thumbnails to Summaries - a Single Deep Neural Network to Rule Them All

Hongxiang Gu, Viswanathan Swaminathan
Conference Papers 2018 International Conference on Multimedia and Expo (ICME), IEEE. 2018.

Abstract

Video summaries come in many forms, from traditional single-image thumbnails, animated thumbnails, storyboards, to trailer-like video summaries. Content creators use the summaries to display the most attractive portion of their videos; the users use them to quickly evaluate if a video is worth watching. All forms of summaries are essential to video viewers, content creators, and advertisers. Often video content management systems have to generate multiple versions of summaries that vary in duration and presentational forms. We present a framework ReconstSum that utilizes LSTM-based autoencoder architecture to extract and select a sparse subset of video frames or keyshots that optimally represent the input video in an unsupervised manner. The encoder selects a subset from the input video while the decoder seeks to reconstruct the video from the selection. The goal is to minimize the difference between the original input video and the reconstructed video. Our method is easily extendable to generate a variety of applications including static video thumbnails, animated thumbnails, storyboards and ”trailer-like” highlights. We specifically study and evaluate two most popular use cases: thumbnail generation and storyboard generation. We demonstrate that our methods generate better results than the state-of-the-art techniques in both use cases.

Securing Interconnected PUF Network with Reconfigurability

Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), IEEE. 2018

Abstract

Physical Unclonable Functions (PUFs) are known for their unclonability and light-weight design. Recent advancement in technology has significantly compromised the security of PUFs. Machine learning-based attacks have been proven to be able to construct numerical models that predict various types of PUFs with high accuracy with a small set of challenge-response pairs (CRPs). To address the problem, we present a reconfigurable interconnected PUF network (IPN) design that significantly strengthens the security and unclonability of strong PUFs. While the IPN structure itself provides high resilience against modeling attacks, the reconfiguration mechanism remaps the input-output mapping before an attacker could collect su cient CRPs. Experimental results show that all tested state-of-the-art machine learning attack methods have prediction accuracy of around 50% on a single bit output of a reconfigurable IPN.

A Low-power APUF-based Environmental Abnormality Detection Framework

Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), IEEE, 2017.

Abstract

Physical unclonable functions (PUFs) take advantage of the effect of process variation on hardware to obtain their unclonability. Traditional PUF design only focuses on the analog signals of circuits. An arbiter PUF, for example, generates responses by racing delay signals. Implementations of such PUFs usually employ large area and power consumption while providing very low throughput. To address this problem, we propose an energy efficient PUF design in such a way that it races analog signals and computes digital logic simultaneously. More importantly, the analog portion of the circuit (racing) shares a large amount of hardware resources with the digital portion of the circuit (computing) by introducing only small overhead in terms of area and power. Our test results on Spartan-6 field-programmable gate array (FPGA) platforms indicate that by combining the two outputs, our design enables much larger PUF output throughput, better randomness and less power consumption compared to traditional PUFs.

An Energy-Efficient PUF Design: Computing While Racing

Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2016 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), IEEE, 2016.

Abstract

Physical unclonable functions (PUFs) take advantage of the effect of process variation on hardware to obtain their unclonability. Traditional PUF design only focuses on the analog signals of circuits. An arbiter PUF, for example, generates responses by racing delay signals. Implementations of such PUFs usually employ large area and power consumption while providing very low throughput. To address this problem, we propose an energy efficient PUF design in such a way that it races analog signals and computes digital logic simultaneously. More importantly, the analog portion of the circuit (racing) shares a large amount of hardware resources with the digital portion of the circuit (computing) by introducing only small overhead in terms of area and power. Our test results on Spartan-6 field-programmable gate array (FPGA) platforms indicate that by combining the two outputs, our design enables much larger PUF output throughput, better randomness and less power consumption compared to traditional PUFs.

An Ultra-Low Energy PUF Matching Security Platform Using Programmable Delay Lines

Teng Xu, Hongxiang Gu, Miodrag Potkonjak
Conference Papers 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), IEEE. 2016.

Abstract

We have proposed a new security platform: physical unclonable function (PUF) matching using programmable delay lines (PDL). Our platform inherits good security properties of standard PUFs, such as low energy, low delay, and unclonability. However, standard PUF-based security protocols induce high computational resources of at least one involved party. To resolve this issue, we take advantage of PDL technology to match standard PUFs in such a way that two PUFs have the same challenge response mapping function. The matched pair of PUFs enables a majority of protocols to be executed in an ultra low energy, low latency manner for all the involved parties.

Data Protection Using Recursive Inverse Function

Teng Xu, Hongxiang Gu, Miodrag Potkonjak
Conference Papers 2015 International Conference on Field-programmable Logic and Applications (FPL), IEEE. 2015

Abstract

Data security and privacy have emerged to become an important issue in various types of applications. Although many cryptographic cyphers are proposed to leverage the issue, they normally suffer from the problems of either requiring large power/bandwidth consumption or employing linear system which is easy to break. To solve the problem of traditional cyphers, we have proposed a new hardware security primitive: recursive inverse function (RIF) designed on the field-programmable gate array (FPGA). The RIF takes advantage of a pair of inverse functions, building a recursive scheme for message encryption and decryption. The inverse functions are defined as a pair of functions where each function implements a mapping being inverse to the mapping of the other function. On the top of it, the recursive structure guarantees the input-output mapping to be statistically extremely hard to predict. The RIF can be easily implemented using hierarchical lookup-table (LUT) structures with low delay and power overhead. Using our proposed RIF structure, we have demonstrated how the RIF can be incorporated into a processor design to enable the data protection. Finally, we implement our scheme on a Xilinx Spartan-6 FPGA device to analyze the performance and the overhead.

Current Work Status

  • Present 08/2019

    Google

    Software Engineer

Work Experience

  • 09/2018 06/2018

    Adobe Resarch

    Research Scientist Intern. Understanding, editing and summarizing online videos with deep reinforcement learning.

  • 09/2017 06/2017

    Adobe Resarch

    Data Science Research Intern. Unsupervised video summarization using generative deep neural networks.

  • 09/2015 06/2015

    Adobe Research

    Research Scientist Intern. Secure video streaming in Trusted Execution Environment (TEE) for Ultra High Definition (UHD) videos.

  • 11/2014 01/2014

    Movnpic

    Co-founder & backend engineer. Design & Develop an iOS app to create Interactive images.

  • 09/2013 06/2013

    Yahoo! Inc.

    Software Development Engineer Intern, Search team. Hyperlocal topic trend detection system.

  • 04/2013 01/2013

    Symantec Corp.

    SQA Intern. Infrastructural security modules within the company.

My Location

I now live in Sunnyvale, CA with my two cats: Mio and Miso.

Please contact me via email if you are interested in talking about research, entrepreneurship and more.